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NTE21128 Integrated Circuit NMOS, 128K (16K x 8) UV EPROM
Description: The NTE21128 is a 131,072 bit UV erasable and electrically programmable memory EPROM in a 28-Lead DIP type package organized as 16,384 words by 8 bits. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. Features: D Access Time: 250ns D Single 5V Supply Voltage D Low Standby Current: 40mA Max D TTL Compatible During Read and Program D Fast Programming Algorithm D Programming Voltage: 12V Typ Absolute Maximum Ratings: Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 6.25V Program Supply, VPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 14V A9 Voltage, VA9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 13.5V Input or Output Voltages, VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 6.25V Ambient Operating Temperature, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70C Temperature Under Bias, TBIAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10 to +80C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to +125C Note 1. Except for the rating "Operating Temperature Range", stresses above those listed in the table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
DC Characteristics (Read Mode and Standby Mode): (TA = 0 to + 70C, VCC = +5V 5%, VPP = VCC)
Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Output Leakage Current Input Leakage Current VCC Current (Standby) VCC Current (Active) VPP Current Symbol VOH VOL VIH VIL ILO ILI ICC1 ICC2 IPP1 VOUT = 5.25V VIN = 5.25V E = VIH G = E = VIL VPP = 5.25V Test Conditions IOH = -400A IOL = 2.1mA Min 2.4 - 2.0 -0.1 - - - - - Typ - - - - - - - 60 - Max - 0.45 VCC +1 0.8 10 10 25 100 15 Unit V V V V A A mA mA mA
DC Characteristics (Program, Program Verify, and Program Inhibit Modes): (TA = +25 5C, VCC = +5V 5% Note 2, VPP = +21V 0.5V)
Parameter Input High Voltage Input Low Voltage Input Leakage Current Output High Voltage Output Low Voltage VCC Current (Program Inhibit) VCC Current (Program Verify) VPP Current (Program) VPP Current (Program Verify) VPP Current (Program Inhibit) Symbol VIH VIL ILI VOH VOL ICC1 ICC2 IPP2 IPP3 IPP4 E = P = VIL E = VIL, P = VIH E = VIH VIN = VIL or VIH IOH = -400A IOL = 2.1mA E = VIH Test Conditions Min 2.0 -0.1 - 2.4 - - - - - - Typ - - - - - - - - - - Max VCC +1 0.8 10 - 0.45 25 100 30 15 15 Unit V V A V V mA mA mA mA mA
Note 2. VCC = 6V 0.25V for high-speed programming. AC Characteristics (Read Mode and Standby Mode): (TA = 0 to + 70C, VCC = +5V 5%, VPP = VCC)
Parameter Address to Output Delay CE to Output Delay Output Enable to Output Delay Output Enable High to Output Delay Address to Output Hold Time Symbol tACC tCE tOE tDF tOH Test Conditions E = G = VIL E = VIL E = VIL E = VIL E = G = VIL Min - - - 0 0 Typ - - - - - Max Unit 250 250 100 85 - ns ns ns ns ns
Test Conditions: Input Rise and Fall Times: 20ns Input Pulse Levels: 0.45V to 2.4V Timing Measurement Reference Levels: Inputs: 0.8V and 2.0V Outputs: 0.8V and 2.0V
AC Characteristics (Program, Program Verify, and Program Inhibit Modes): (TA = +25 5C, VCC = +5V 5%, VPP = +21V 0.5V)
Parameter Address Setup Time E Setup Time Data Setup Time Address Hold Time E Setup Time Data Hold Time Chip Enable to Output Float Delay Data Valid from E Program Pulse Width (Note 3) VPP Setup Time Symbol tAS tOES tDS tAH tCES tDH tDF tOE tPW tVS Test Conditions Input Pulse Levels = 0.45V to 2.4V, Input Timing Reference Level = 0.8V and 2V, Output Timing Reference Level = 0.8V and 2V, Input Rise and Fall Times: 20ns Min 2 2 2 0 2 2 0 - 45 2 Typ - - - - - - - - 50 - Max Unit - - - - - - 130 150 55 - s s s s s s ns ns ms s
Note 3. Initial Program Pulse width tolerance is 1msec 5%. Test Conditions: Input Pulse Levels: 0.45V to 2.4V Input Timing Reference Level: 0.8V and 2.0V Output Timing Reference Level: 0.8V and 2.0V Input Rise and Fall Times: 20ns Capacitance: (TA = +25C, f = 1MHz)
Parameter Input Capacitance Output Capacitance Symbol CIN COUT VIN = 0V VOUT = 0V Test Conditions Min - - Typ 4 8 Max Unit 8 14 pF pF
Device Operation: A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP. Read Mode The NTE21128 has the following two control functions: Chip Enable (E) is the power control used for device selection and Output Enable (G) is the output control used to gate data to the output pins, independent of device selection. Address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the outputs after the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV - tGLQV. Standby Mode The standby mode, reducing the maximum active power current from 85mA to 40mA, is achieved by applying a TTL high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input.
Device Operation (Cont'd): Two Line Output Control The NTE21128 features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. System Considerations The power switching characteristics of EPROMs require careful decoupling of the devices. The supply current (ICC) has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of these transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selecting decoupling capacitors. It is recommended that a 1f ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7f bulk electrolytic capacitor should be used between VCC and GND for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. Programming When delivered, all bits of the NTE21128 are in the "1" state. Data is introduced by selectively programming "0s" into the desired bit locations. Although only "0s" will be programmed, both "1s" and "0s" can be present in the data word. The only way to change a "0" to a "1" is by ultraviolet light erasure. The NTE21128 is in the programming mode when the VPP input is at 12.5V and E and P are at TTL low. The data to be programmed is applied 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. Fast Programming Algorithm Fast Programming Algorithm rapidly programs the NTE21128 EPROM using an efficient and reliable method suited to the production programming environment. Programming reliability is also ensured as the incremental program margin of each byte is continually monitored to determine when it has been successfully programmed. The Fast Programming Algorithm utilizes two different pulse types: initial and overprogram. The duration of the initial P pulse(s) is 1ms, which will then be followed by a longer overprogram pulse of length 3ms by n (n is equal to the number of the initial one-millisecond pulses applied to a particular NTE21128 location), before a correct verify occurs. Up to 25 one-millisecond pulses per byte are provided for before the over program pulse is applied. The entire sequence of program pulses and byte verifications is performed at VCC = 6V and VPP = 12.5V. When the Fast Programming cycle has been completed, all bytes should be compared to the original data with VCC = 5V and VPP = 5V.
Device Operation (Cont'd): Program Inhibit Programming of multiple NTE21128s in parallel with different data is also easily accomplished. Except for E, all like inputs (including G) of the parallel NTE21128 may be common. A TTL low pulse applied to an NTE21128's E input, with VPP = 12.5V, will program that NTE21128> A high level E input inhibits the other NTE21128s from being programmed. Program Verify A verify should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G = VIL, E = VIL, P = VIH, and VPP at 12.5V.
Erasure Operation: The erasure characteristic of the NTE21128 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 angstroms. The recommended erasure procedure for the NTE21128 is exposure to short wave ultraviolet light which has a wavelength of 2537 angstroms. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 W/cm2 power rating. The NTE21128 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure.
Pin Connection Diagram
VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC PGM A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3
1.449 (36.8)
28
15 .577 (14.6)
1
14 .230 (5.84) Max
.100 (2.54)
.100 (2.54) Min

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